Index: head/sys/amd64/include/atomic.h =================================================================== --- head/sys/amd64/include/atomic.h +++ head/sys/amd64/include/atomic.h @@ -57,6 +57,8 @@ #define wmb() __asm __volatile("sfence;" : : : "memory") #define rmb() __asm __volatile("lfence;" : : : "memory") +#include + /* * Various simple operations on memory, each of which is atomic in the * presence of interrupts and multiple processors. Index: head/sys/arm/include/atomic.h =================================================================== --- head/sys/arm/include/atomic.h +++ head/sys/arm/include/atomic.h @@ -41,6 +41,8 @@ #ifndef _MACHINE_ATOMIC_H_ #define _MACHINE_ATOMIC_H_ +#include + #include #ifndef _KERNEL Index: head/sys/arm64/include/atomic.h =================================================================== --- head/sys/arm64/include/atomic.h +++ head/sys/arm64/include/atomic.h @@ -29,6 +29,8 @@ #ifndef _MACHINE_ATOMIC_H_ #define _MACHINE_ATOMIC_H_ +#include + #define isb() __asm __volatile("isb" : : : "memory") /* Index: head/sys/i386/include/atomic.h =================================================================== --- head/sys/i386/include/atomic.h +++ head/sys/i386/include/atomic.h @@ -34,6 +34,8 @@ #error this file needs sys/cdefs.h as a prerequisite #endif +#include + #ifdef _KERNEL #include #include Index: head/sys/mips/include/atomic.h =================================================================== --- head/sys/mips/include/atomic.h +++ head/sys/mips/include/atomic.h @@ -36,6 +36,8 @@ #error this file needs sys/cdefs.h as a prerequisite #endif +#include + /* * Note: All the 64-bit atomic operations are only atomic when running * in 64-bit mode. It is assumed that code compiled for n32 and n64 Index: head/sys/powerpc/include/atomic.h =================================================================== --- head/sys/powerpc/include/atomic.h +++ head/sys/powerpc/include/atomic.h @@ -38,6 +38,8 @@ #error this file needs sys/cdefs.h as a prerequisite #endif +#include + /* * The __ATOMIC_REL/ACQ() macros provide memory barriers only in conjunction * with the atomic lXarx/stXcx. sequences below. They are not exposed outside Index: head/sys/riscv/include/atomic.h =================================================================== --- head/sys/riscv/include/atomic.h +++ head/sys/riscv/include/atomic.h @@ -37,6 +37,8 @@ #ifndef _MACHINE_ATOMIC_H_ #define _MACHINE_ATOMIC_H_ +#include + #define fence() __asm __volatile("fence" ::: "memory"); #define mb() fence() #define rmb() fence() Index: head/sys/sparc64/include/atomic.h =================================================================== --- head/sys/sparc64/include/atomic.h +++ head/sys/sparc64/include/atomic.h @@ -39,6 +39,8 @@ #define wmb() mb() #define rmb() mb() +#include + /* Userland needs different ASI's. */ #ifdef _KERNEL #define __ASI_ATOMIC ASI_N Index: head/sys/sys/atomic_common.h =================================================================== --- head/sys/sys/atomic_common.h +++ head/sys/sys/atomic_common.h @@ -0,0 +1,73 @@ +/*- + * SPDX-License-Identifier: BSD-2-Clause-FreeBSD + * + * Copyright (c) 2017 The FreeBSD Foundation + * All rights reserved. + * + * This software was developed by Konstantin Belousov + * under sponsorship from the FreeBSD Foundation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ +#ifndef _SYS_ATOMIC_COMMON_H_ +#define _SYS_ATOMIC_COMMON_H_ + +#ifndef _MACHINE_ATOMIC_H_ +#error do not include this header, use machine/atomic.h +#endif + +#define atomic_load_char(p) (*(volatile u_char *)(p)) +#define atomic_load_short(p) (*(volatile u_short *)(p)) +#define atomic_load_int(p) (*(volatile u_int *)(p)) +#define atomic_load_long(p) (*(volatile u_long *)(p)) +#define atomic_load_ptr(p) (*(volatile uintptr_t*)(p)) +#define atomic_load_8(p) (*(volatile uint8_t *)(p)) +#define atomic_load_16(p) (*(volatile uint16_t *)(p)) +#define atomic_load_32(p) (*(volatile uint32_t *)(p)) +#ifdef _LP64 +#define atomic_load_64(p) (*(volatile uint64_t *)(p)) +#endif + +#define atomic_store_char(p, v) \ + (*(volatile u_char *)(p) = (u_char)(v)) +#define atomic_store_short(p, v) \ + (*(volatile u_short *)(p) = (u_short)(v)) +#define atomic_store_int(p, v) \ + (*(volatile u_int *)(p) = (u_int)(v)) +#define atomic_store_long(p, v) \ + (*(volatile u_long *)(p) = (u_long)(v)) +#define atomic_store_ptr(p, v) \ + (*(uintptr_t *)(p) = (uintptr_t)(v)) +#define atomic_store_8(p, v) \ + (*(volatile uint8_t *)(p) = (uint8_t)(v)) +#define atomic_store_16(p, v) \ + (*(volatile uint16_t *)(p) = (uint16_t)(v)) +#define atomic_store_32(p, v) \ + (*(volatile uint32_t *)(p) = (uint32_t)(v)) +#ifdef _LP64 +#define atomic_store_64(p, v) \ + (*(volatile uint64_t *)(p) = (uint64_t)(v)) +#endif + +#endif