Index: sys/amd64/amd64/prof_machdep.c =================================================================== --- sys/amd64/amd64/prof_machdep.c +++ sys/amd64/amd64/prof_machdep.c @@ -245,7 +245,8 @@ } SYSCTL_PROC(_machdep, OID_AUTO, cputime_clock, CTLTYPE_INT | CTLFLAG_RW, - 0, sizeof(u_int), sysctl_machdep_cputime_clock, "I", ""); + 0, sizeof(u_int), sysctl_machdep_cputime_clock, "I", + "CPU clock time"); /* * The start and stop routines need not be here since we turn off profiling Index: sys/dev/sio/sio.c =================================================================== --- sys/dev/sio/sio.c +++ sys/dev/sio/sio.c @@ -291,10 +291,12 @@ int comconsole = -1; static volatile speed_t comdefaultrate = CONSPEED; static u_long comdefaultrclk = DEFAULT_RCLK; -SYSCTL_ULONG(_machdep, OID_AUTO, conrclk, CTLFLAG_RW, &comdefaultrclk, 0, ""); +SYSCTL_ULONG(_machdep, OID_AUTO, conrclk, CTLFLAG_RW, &comdefaultrclk, 0, + "Default register clock speed"); static speed_t gdbdefaultrate = GDBSPEED; SYSCTL_UINT(_machdep, OID_AUTO, gdbspeed, CTLFLAG_RW, - &gdbdefaultrate, GDBSPEED, ""); + &gdbdefaultrate, GDBSPEED, + "Default serial GDB speed"); static u_int com_events; /* input chars + weighted output completions */ static Port_t siocniobase; static int siocnunit = -1; @@ -374,8 +376,9 @@ return error; } -SYSCTL_PROC(_machdep, OID_AUTO, conspeed, CTLTYPE_INT | CTLFLAG_RWTUN | CTLFLAG_NOFETCH, - 0, 0, sysctl_machdep_comdefaultrate, "I", ""); +SYSCTL_PROC(_machdep, OID_AUTO, conspeed, CTLTYPE_INT | CTLFLAG_RWTUN | + CTLFLAG_NOFETCH, 0, 0, sysctl_machdep_comdefaultrate, "I", + "Default console speed"); TUNABLE_INT("machdep.conspeed", __DEVOLATILE(int *, &comdefaultrate)); #define SET_FLAG(dev, bit) device_set_flags(dev, device_get_flags(dev) | (bit)) Index: sys/i386/bios/apm.c =================================================================== --- sys/i386/bios/apm.c +++ sys/i386/bios/apm.c @@ -144,12 +144,18 @@ } \ } while (0) -SYSCTL_INT(_machdep, OID_AUTO, apm_suspend_delay, CTLFLAG_RW, &apm_suspend_delay, 1, ""); -SYSCTL_INT(_machdep, OID_AUTO, apm_standby_delay, CTLFLAG_RW, &apm_standby_delay, 1, ""); -SYSCTL_INT(_debug, OID_AUTO, apm_debug, CTLFLAG_RW, &apm_debug, 0, ""); +SYSCTL_INT(_machdep, OID_AUTO, apm_suspend_delay, CTLFLAG_RW, + &apm_suspend_delay, 1, + "Delay before entering suspend"); +SYSCTL_INT(_machdep, OID_AUTO, apm_standby_delay, CTLFLAG_RW, + &apm_standby_delay, 1, + "Delay before entering standby"); +SYSCTL_INT(_debug, OID_AUTO, apm_debug, CTLFLAG_RW, &apm_debug, 0, + "APM debug level"); SYSCTL_INT(_machdep, OID_AUTO, apm_swab_batt_minutes, CTLFLAG_RWTUN, - &apm_swab_batt_minutes, 0, "Byte swap battery time value."); + &apm_swab_batt_minutes, 0, + "Whether battery time requires endian byte swap"); /* * return 0 if the function successfull, Index: sys/i386/i386/elan-mmcr.c =================================================================== --- sys/i386/i386/elan-mmcr.c +++ sys/i386/i386/elan-mmcr.c @@ -321,7 +321,8 @@ } SYSCTL_PROC(_machdep, OID_AUTO, elan_freq, CTLTYPE_UINT | CTLFLAG_RW, - 0, sizeof (u_int), sysctl_machdep_elan_freq, "IU", ""); + 0, sizeof (u_int), sysctl_machdep_elan_freq, "IU", + "Elan timecounter frequency"); /* * Positively identifying the Elan can only be done through the PCI id of Index: sys/i386/i386/mp_clock.c =================================================================== --- sys/i386/i386/mp_clock.c +++ sys/i386/i386/mp_clock.c @@ -82,7 +82,8 @@ } SYSCTL_PROC(_machdep, OID_AUTO, piix_freq, CTLTYPE_INT | CTLFLAG_RW, - 0, sizeof(u_int), sysctl_machdep_piix_freq, "I", ""); + 0, sizeof(u_int), sysctl_machdep_piix_freq, "I", + "PIIX timecounter frequency"); static unsigned piix_get_timecount(struct timecounter *tc) Index: sys/i386/i386/prof_machdep.c =================================================================== --- sys/i386/i386/prof_machdep.c +++ sys/i386/i386/prof_machdep.c @@ -277,7 +277,8 @@ } SYSCTL_PROC(_machdep, OID_AUTO, cputime_clock, CTLTYPE_INT | CTLFLAG_RW, - 0, sizeof(u_int), sysctl_machdep_cputime_clock, "I", ""); + 0, sizeof(u_int), sysctl_machdep_cputime_clock, "I", + "CPU clock time"); /* * The start and stop routines need not be here since we turn off profiling Index: sys/powerpc/aim/mmu_oea.c =================================================================== --- sys/powerpc/aim/mmu_oea.c +++ sys/powerpc/aim/mmu_oea.c @@ -223,20 +223,27 @@ u_int moea_pvo_enter_calls = 0; u_int moea_pvo_remove_calls = 0; u_int moea_pte_spills = 0; -SYSCTL_INT(_machdep, OID_AUTO, moea_pte_valid, CTLFLAG_RD, &moea_pte_valid, - 0, ""); +SYSCTL_INT(_machdep, OID_AUTO, moea_pte_valid, CTLFLAG_RD, + &moea_pte_valid, 0, + "Number of valid pte entries"); SYSCTL_INT(_machdep, OID_AUTO, moea_pte_overflow, CTLFLAG_RD, - &moea_pte_overflow, 0, ""); + &moea_pte_overflow, 0, + "Number of pte overflow entries"); SYSCTL_INT(_machdep, OID_AUTO, moea_pte_replacements, CTLFLAG_RD, - &moea_pte_replacements, 0, ""); -SYSCTL_INT(_machdep, OID_AUTO, moea_pvo_entries, CTLFLAG_RD, &moea_pvo_entries, - 0, ""); + &moea_pte_replacements, 0, + "Number of pte replacements"); +SYSCTL_INT(_machdep, OID_AUTO, moea_pvo_entries, CTLFLAG_RD, + &moea_pvo_entries, 0, + "Number of pvo entries"); SYSCTL_INT(_machdep, OID_AUTO, moea_pvo_enter_calls, CTLFLAG_RD, - &moea_pvo_enter_calls, 0, ""); + &moea_pvo_enter_calls, 0, + "Number of pvo enter calls"); SYSCTL_INT(_machdep, OID_AUTO, moea_pvo_remove_calls, CTLFLAG_RD, - &moea_pvo_remove_calls, 0, ""); + &moea_pvo_remove_calls, 0, + "Number of pvo remove calls"); SYSCTL_INT(_machdep, OID_AUTO, moea_pte_spills, CTLFLAG_RD, - &moea_pte_spills, 0, ""); + &moea_pte_spills, 0, + "Number of pte spills"); /* * Allocate physical memory for use in moea_bootstrap. Index: sys/powerpc/aim/mmu_oea64.c =================================================================== --- sys/powerpc/aim/mmu_oea64.c +++ sys/powerpc/aim/mmu_oea64.c @@ -173,8 +173,9 @@ static int moea64_bpvo_pool_index = 0; static int moea64_bpvo_pool_size = 327680; TUNABLE_INT("machdep.moea64_bpvo_pool_size", &moea64_bpvo_pool_size); -SYSCTL_INT(_machdep, OID_AUTO, moea64_allocated_bpvo_entries, CTLFLAG_RD, - &moea64_bpvo_pool_index, 0, ""); +SYSCTL_INT(_machdep, OID_AUTO, moea64_allocated_bpvo_entries, CTLFLAG_RD, + &moea64_bpvo_pool_index, 0, + "Current index of the bvpo pool"); #define VSID_NBPW (sizeof(u_int32_t) * 8) #ifdef __powerpc64__ @@ -196,16 +197,21 @@ u_int moea64_pvo_entries = 0; u_int moea64_pvo_enter_calls = 0; u_int moea64_pvo_remove_calls = 0; -SYSCTL_INT(_machdep, OID_AUTO, moea64_pte_valid, CTLFLAG_RD, - &moea64_pte_valid, 0, ""); +SYSCTL_INT(_machdep, OID_AUTO, moea64_pte_valid, CTLFLAG_RD, + &moea64_pte_valid, 0, + "Number of valid pte entries"); SYSCTL_INT(_machdep, OID_AUTO, moea64_pte_overflow, CTLFLAG_RD, - &moea64_pte_overflow, 0, ""); -SYSCTL_INT(_machdep, OID_AUTO, moea64_pvo_entries, CTLFLAG_RD, - &moea64_pvo_entries, 0, ""); + &moea64_pte_overflow, 0, + "Number of pte overflow entries"); +SYSCTL_INT(_machdep, OID_AUTO, moea64_pvo_entries, CTLFLAG_RD, + &moea64_pvo_entries, 0, + "Number of pvo entries"); SYSCTL_INT(_machdep, OID_AUTO, moea64_pvo_enter_calls, CTLFLAG_RD, - &moea64_pvo_enter_calls, 0, ""); + &moea64_pvo_enter_calls, 0, + "Number of pvo enter calls"); SYSCTL_INT(_machdep, OID_AUTO, moea64_pvo_remove_calls, CTLFLAG_RD, - &moea64_pvo_remove_calls, 0, ""); + &moea64_pvo_remove_calls, 0, + "Number of pvo remove calls"); vm_offset_t moea64_scratchpage_va[2]; struct pvo_entry *moea64_scratchpage_pvo[2]; Index: sys/powerpc/powerpc/machdep.c =================================================================== --- sys/powerpc/powerpc/machdep.c +++ sys/powerpc/powerpc/machdep.c @@ -153,7 +153,8 @@ SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL); SYSCTL_INT(_machdep, CPU_CACHELINE, cacheline_size, - CTLFLAG_RD, &cacheline_size, 0, ""); + CTLFLAG_RD, &cacheline_size, 0, + "Cacheline size"); uintptr_t powerpc_init(vm_offset_t, vm_offset_t, vm_offset_t, void *, uint32_t);