Index: sys/dev/bnxt/bnxt_en/bnxt.h
===================================================================
--- sys/dev/bnxt/bnxt_en/bnxt.h
+++ sys/dev/bnxt/bnxt_en/bnxt.h
@@ -1250,6 +1250,10 @@
 	#define BNXT_FW_CAP_CFA_NTUPLE_RX_EXT_IP_PROTO	BIT_ULL(47)
 	#define BNXT_FW_CAP_ENABLE_RDMA_SRIOV		BIT_ULL(48)
 	#define BNXT_FW_CAP_RSS_TCAM			BIT_ULL(49)
+
+	#define BNXT_FW_CAP_SW_MAX_RESOURCE_LIMITS      BIT_ULL(61)
+	#define BNXT_SW_RES_LMT(bp) ((bp)->fw_cap & BNXT_FW_CAP_SW_MAX_RESOURCE_LIMITS)
+
 	uint32_t		lpi_tmr_lo;
 	uint32_t		lpi_tmr_hi;
 	/* copied from flags and flags2 in hwrm_port_phy_qcaps_output */
Index: sys/dev/bnxt/bnxt_en/bnxt_hwrm.c
===================================================================
--- sys/dev/bnxt/bnxt_en/bnxt_hwrm.c
+++ sys/dev/bnxt/bnxt_en/bnxt_hwrm.c
@@ -1218,6 +1218,9 @@
 	    flags_ext & HWRM_FUNC_QCAPS_OUTPUT_FLAGS_EXT_DBR_PACING_SUPPORTED)
 		softc->fw_cap |= BNXT_FW_CAP_DBR_PACING_SUPPORTED;
 
+	if (flags_ext2 & HWRM_FUNC_QCAPS_OUTPUT_FLAGS_EXT2_SW_MAX_RESOURCE_LIMITS_SUPPORTED)
+		softc->fw_cap |= BNXT_FW_CAP_SW_MAX_RESOURCE_LIMITS;
+
 	if (flags_ext2 & HWRM_FUNC_QCAPS_OUTPUT_FLAGS_EXT2_GENERIC_STATS_SUPPORTED)
 		softc->fw_cap |= BNXT_FW_CAP_GENERIC_STATS;
 	func->fw_fid = le16toh(resp->fid);
Index: sys/dev/bnxt/bnxt_en/bnxt_ulp.h
===================================================================
--- sys/dev/bnxt/bnxt_en/bnxt_ulp.h
+++ sys/dev/bnxt/bnxt_en/bnxt_ulp.h
@@ -90,8 +90,10 @@
 	#define BNXT_EN_FLAG_ULP_STOPPED	0x8
 	#define BNXT_EN_FLAG_ASYM_Q		0x10
 	#define BNXT_EN_FLAG_MULTI_HOST		0x20
+	#define BNXT_EN_FLAG_SW_RES_LMT         0x400
 #define BNXT_EN_ASYM_Q(edev)		((edev)->flags & BNXT_EN_FLAG_ASYM_Q)
 #define BNXT_EN_MH(edev)		((edev)->flags & BNXT_EN_FLAG_MULTI_HOST)
+#define BNXT_EN_SW_RES_LMT(edev)       ((edev)->flags & BNXT_EN_FLAG_SW_RES_LMT)
 	const struct bnxt_en_ops	*en_ops;
 	struct bnxt_ulp			ulp_tbl[BNXT_MAX_ULP];
 	int                             l2_db_offset;   /* Doorbell BAR offset
Index: sys/dev/bnxt/bnxt_en/bnxt_ulp.c
===================================================================
--- sys/dev/bnxt/bnxt_en/bnxt_ulp.c
+++ sys/dev/bnxt/bnxt_en/bnxt_ulp.c
@@ -458,6 +458,8 @@
 		edev->flags |= BNXT_EN_FLAG_ROCEV2_CAP;
 	if (bp->is_asym_q)
 		edev->flags |= BNXT_EN_FLAG_ASYM_Q;
+	if (BNXT_SW_RES_LMT(bp))
+		edev->flags |= BNXT_EN_FLAG_SW_RES_LMT;
 	edev->hwrm_bar = bp->hwrm_bar;
 	edev->port_partition_type = bp->port_partition_type;
 	edev->ulp_version = BNXT_ULP_VERSION;
Index: sys/dev/bnxt/bnxt_en/if_bnxt.c
===================================================================
--- sys/dev/bnxt/bnxt_en/if_bnxt.c
+++ sys/dev/bnxt/bnxt_en/if_bnxt.c
@@ -1198,8 +1198,13 @@
 	max_srqs = ctxm->max_entries;
 	if (softc->flags & BNXT_FLAG_ROCE_CAP) {
 		pg_lvl = 2;
-		extra_qps = min_t(u32, 65536, max_qps - l2_qps - qp1_qps);
-		extra_srqs = min_t(u32, 8192, max_srqs - srqs);
+		if (BNXT_SW_RES_LMT(softc)) {
+			extra_qps = max_qps - l2_qps - qp1_qps;
+			extra_srqs = max_srqs - srqs;
+		} else {
+			extra_qps = min_t(uint32_t, 65536, max_qps - l2_qps - qp1_qps);
+			extra_srqs = min_t(uint32_t, 8192, max_srqs - srqs);
+		}
 	}
 
 	ctxm = &ctx->ctx_arr[BNXT_CTX_QP];
Index: sys/dev/bnxt/bnxt_re/qplib_res.h
===================================================================
--- sys/dev/bnxt/bnxt_re/qplib_res.h
+++ sys/dev/bnxt/bnxt_re/qplib_res.h
@@ -843,4 +843,11 @@
 		break;
 	}
 }
+
+static inline u32 bnxt_re_cap_fw_res(u32 fw_val, u32 drv_cap, bool sw_max_en)
+{
+	if (sw_max_en)
+		return fw_val;
+	return min_t(u32, fw_val, drv_cap);
+}
 #endif
Index: sys/dev/bnxt/bnxt_re/qplib_sp.c
===================================================================
--- sys/dev/bnxt/bnxt_re/qplib_sp.c
+++ sys/dev/bnxt/bnxt_re/qplib_sp.c
@@ -40,6 +40,7 @@
 #include "qplib_res.h"
 #include "qplib_rcfw.h"
 #include "qplib_sp.h"
+#include "bnxt_ulp.h"
 
 const struct bnxt_qplib_gid bnxt_qplib_gid_zero = {{ 0, 0, 0, 0, 0, 0, 0, 0,
 						     0, 0, 0, 0, 0, 0, 0, 0 }};
@@ -79,6 +80,7 @@
 
 int bnxt_qplib_get_dev_attr(struct bnxt_qplib_rcfw *rcfw)
 {
+	struct bnxt_qplib_max_res dev_res = {};
 	struct creq_query_func_resp resp = {};
 	struct bnxt_qplib_cmdqmsg msg = {};
 	struct creq_query_func_resp_sb *sb;
@@ -86,10 +88,10 @@
 	struct bnxt_qplib_dev_attr *attr;
 	struct bnxt_qplib_chip_ctx *cctx;
 	struct cmdq_query_func req = {};
+	bool sw_max_en;
 	u8 *tqm_alloc;
 	int i, rc = 0;
 	u32 temp;
-	u8 chip_gen = BNXT_RE_DEFAULT;
 
 	cctx = rcfw->res->cctx;
 	attr = rcfw->res->dattr;
@@ -110,10 +112,11 @@
 	rc = bnxt_qplib_rcfw_send_message(rcfw, &msg);
 	if (rc)
 		goto bail;
+	bnxt_qplib_max_res_supported(cctx, rcfw->res, &dev_res, false);
+	sw_max_en = BNXT_EN_SW_RES_LMT(rcfw->res->en_dev);
 	/* Extract the context from the side buffer */
-	chip_gen = _get_chip_gen_p5_type(cctx);
-	attr->max_qp = le32_to_cpu(sb->max_qp);
-	attr->max_qp = min_t(u32, attr->max_qp, BNXT_RE_MAX_QP_SUPPORTED(chip_gen));
+	attr->max_qp = bnxt_re_cap_fw_res(le32_to_cpu(sb->max_qp),
+					  dev_res.max_qp, sw_max_en);
 	/* max_qp value reported by FW does not include the QP1 */
 	attr->max_qp += 1;
 	attr->max_qp_rd_atom =
@@ -142,29 +145,29 @@
 	if (_is_chip_gen_p5_p7(cctx) &&
 	    cctx->modes.wqe_mode == BNXT_QPLIB_WQE_MODE_VARIABLE)
 		attr->max_qp_sges = sb->max_sge_var_wqe;
-	attr->max_cq = le32_to_cpu(sb->max_cq);
-	attr->max_cq = min_t(u32, attr->max_cq, BNXT_RE_MAX_CQ_SUPPORTED(chip_gen));
+	attr->max_cq = bnxt_re_cap_fw_res(le32_to_cpu(sb->max_cq),
+						dev_res.max_cq, sw_max_en);
 
 	attr->max_cq_wqes = le32_to_cpu(sb->max_cqe);
 	attr->max_cq_wqes = min_t(u32, BNXT_QPLIB_MAX_CQ_WQES, attr->max_cq_wqes);
 
 	attr->max_cq_sges = attr->max_qp_sges;
-	attr->max_mr = le32_to_cpu(sb->max_mr);
-	attr->max_mr = min_t(u32, attr->max_mr, BNXT_RE_MAX_MRW_SUPPORTED(chip_gen));
-	attr->max_mw = le32_to_cpu(sb->max_mw);
-	attr->max_mw = min_t(u32, attr->max_mw, BNXT_RE_MAX_MRW_SUPPORTED(chip_gen));
+	attr->max_mr = bnxt_re_cap_fw_res(le32_to_cpu(sb->max_mr),
+                                      dev_res.max_mr, sw_max_en);
+	attr->max_mw = bnxt_re_cap_fw_res(le32_to_cpu(sb->max_mw),
+                                      dev_res.max_mr, sw_max_en);
 
 	attr->max_mr_size = le64_to_cpu(sb->max_mr_size);
 	attr->max_pd = BNXT_QPLIB_MAX_PD;
 	attr->max_raw_ethy_qp = le32_to_cpu(sb->max_raw_eth_qp);
-	attr->max_ah = le32_to_cpu(sb->max_ah);
-	attr->max_ah = min_t(u32, attr->max_ah, BNXT_RE_MAX_AH_SUPPORTED(chip_gen));
+	attr->max_ah = bnxt_re_cap_fw_res(le32_to_cpu(sb->max_ah),
+					  dev_res.max_ah, sw_max_en);
 
 	attr->max_fmr = le32_to_cpu(sb->max_fmr);
 	attr->max_map_per_fmr = sb->max_map_per_fmr;
 
-	attr->max_srq = le16_to_cpu(sb->max_srq);
-	attr->max_srq = min_t(u32, attr->max_srq, BNXT_RE_MAX_SRQ_SUPPORTED(chip_gen));
+	attr->max_srq = bnxt_re_cap_fw_res(le16_to_cpu(sb->max_srq),
+                                          dev_res.max_srq, sw_max_en);
 	attr->max_srq_wqes = le32_to_cpu(sb->max_srq_wr) - 1;
 	attr->max_srq_sges = sb->max_srq_sge;
 	attr->max_pkey = 1;