Index: sys/riscv/riscv/cbo.c
===================================================================
--- sys/riscv/riscv/cbo.c
+++ sys/riscv/riscv/cbo.c
@@ -1,7 +1,7 @@
 /*-
  * SPDX-License-Identifier: BSD-2-Clause
  *
- * Copyright (c) 2025 Ruslan Bukin <br@bsdpad.com>
+ * Copyright (c) 2025-2026 Ruslan Bukin <br@bsdpad.com>
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -42,8 +42,8 @@
 	 * an invalidate operation.
 	 */
 
-	va &= ~(dcache_line_size - 1);
-	for (addr = va; addr < va + len; addr += dcache_line_size)
+	for (addr = __align_down(va, dcache_line_size); addr < va + len;
+	    addr += dcache_line_size)
 		__asm __volatile(".option push; .option arch, +zicbom\n"
 				 "cbo.flush (%0); .option pop\n" :: "r"(addr));
 }
@@ -60,8 +60,8 @@
 	 * block from the set of coherent caches up to that point.
 	 */
 
-	va &= ~(dcache_line_size - 1);
-	for (addr = va; addr < va + len; addr += dcache_line_size)
+	for (addr = __align_down(va, dcache_line_size); addr < va + len;
+	    addr += dcache_line_size)
 		__asm __volatile(".option push; .option arch, +zicbom\n"
 				 "cbo.inval (%0); .option pop\n" :: "r"(addr));
 }
@@ -80,8 +80,8 @@
 	 * previous invalidate, clean, or flush operation on the cache block.
 	 */
 
-	va &= ~(dcache_line_size - 1);
-	for (addr = va; addr < va + len; addr += dcache_line_size)
+	for (addr = __align_down(va, dcache_line_size); addr < va + len;
+	    addr += dcache_line_size)
 		__asm __volatile(".option push; .option arch, +zicbom\n"
 				 "cbo.clean (%0); .option pop\n" :: "r"(addr));
 }