diff --git a/cad/Makefile b/cad/Makefile index dcc804239173..6bd9f9e8d8d6 100644 --- a/cad/Makefile +++ b/cad/Makefile @@ -1,133 +1,134 @@ COMMENT = CAD tools SUBDIR += NASTRAN-95 SUBDIR += PrusaSlicer SUBDIR += abc SUBDIR += admesh SUBDIR += adms SUBDIR += alliance SUBDIR += appcsxcad SUBDIR += archimedes SUBDIR += astk-client SUBDIR += astk-serveur SUBDIR += atlc SUBDIR += basicdsp SUBDIR += brlcad SUBDIR += calculix SUBDIR += calculix-ccx SUBDIR += caneda SUBDIR += cascade SUBDIR += cascade-compiler SUBDIR += chipvault SUBDIR += csxcad SUBDIR += cura SUBDIR += cura-engine SUBDIR += digital SUBDIR += dinotrace SUBDIR += ecpprog SUBDIR += electric SUBDIR += electric-ng SUBDIR += fasm SUBDIR += fdm_materials SUBDIR += feappv SUBDIR += fidocadj SUBDIR += freecad SUBDIR += freehdl SUBDIR += fritzing SUBDIR += gdsreader SUBDIR += gdt SUBDIR += geda SUBDIR += gerbv SUBDIR += ghdl SUBDIR += gmsh SUBDIR += gnucap SUBDIR += gplcver SUBDIR += graywolf SUBDIR += gspiceui SUBDIR += gtkwave SUBDIR += horizon-eda SUBDIR += ifcopenshell SUBDIR += impact SUBDIR += irsim SUBDIR += iverilog SUBDIR += jspice3 SUBDIR += k40-whisperer SUBDIR += kicad SUBDIR += kicad-devel SUBDIR += kicad-doc SUBDIR += kicad-library-footprints SUBDIR += kicad-library-footprints-devel SUBDIR += kicad-library-packages3d SUBDIR += kicad-library-packages3d-devel SUBDIR += kicad-library-symbols SUBDIR += kicad-library-symbols-devel SUBDIR += kicad-library-templates SUBDIR += kicad-library-templates-devel SUBDIR += klayout SUBDIR += ktechlab SUBDIR += ldraw SUBDIR += ldview SUBDIR += leocad SUBDIR += lepton-eda SUBDIR += libopencad SUBDIR += librecad SUBDIR += libredwg SUBDIR += librepcb SUBDIR += linux-eagle5 SUBDIR += logisim SUBDIR += magic SUBDIR += meshdev SUBDIR += meshlab SUBDIR += netgen SUBDIR += netgen-lvs SUBDIR += ngspice_rework SUBDIR += nvc SUBDIR += opencascade SUBDIR += openctm SUBDIR += openfpgaloader SUBDIR += openroad SUBDIR += openscad SUBDIR += openscad-devel + SUBDIR += opentimer SUBDIR += openvsp SUBDIR += oregano SUBDIR += p5-GDS2 SUBDIR += p5-Verilog-Perl SUBDIR += pcb SUBDIR += pdnmesh SUBDIR += py-cadquery SUBDIR += py-cq-editor SUBDIR += py-ezdxf SUBDIR += py-gdspy SUBDIR += py-lcapy SUBDIR += py-ocp SUBDIR += py-phidl SUBDIR += py-pyfda SUBDIR += python-gdsii SUBDIR += qcad SUBDIR += qcsxcad SUBDIR += qelectrotech SUBDIR += qflow SUBDIR += qmls SUBDIR += qrouter SUBDIR += repsnapper SUBDIR += rubygem-gdsii SUBDIR += scotch SUBDIR += solvespace SUBDIR += sp2sp SUBDIR += spice SUBDIR += stepcode SUBDIR += stm32flash SUBDIR += sumo SUBDIR += sweethome3d SUBDIR += tkgate SUBDIR += tochnog SUBDIR += uranium SUBDIR += verilator SUBDIR += verilog-mode.el SUBDIR += veroroute SUBDIR += xcircuit SUBDIR += yosys SUBDIR += z88 SUBDIR += zcad .include diff --git a/cad/opentimer/Makefile b/cad/opentimer/Makefile new file mode 100644 index 000000000000..00abe79cf029 --- /dev/null +++ b/cad/opentimer/Makefile @@ -0,0 +1,33 @@ +PORTNAME= opentimer +PORTVERSION= g20210726 +CATEGORIES= cad + +MAINTAINER= yuri@FreeBSD.org +COMMENT= High-performance timing analysis tool for VLSI systems + +LICENSE= MIT +LICENSE_FILE= ${WRKSRC}/LICENSE + +USES= cmake compiler:c++17-lang tcl +USE_GCC= yes # fails to build with clang-11: https://github.com/OpenTimer/OpenTimer/issues/48 + +USE_GITHUB= yes +GH_ACCOUNT= OpenTimer +GH_PROJECT= OpenTimer +GH_TAGNAME= 18d28ff + +PLIST_FILES= bin/ot-shell \ + bin/ot-tau15 \ + bin/ot-tau18 \ + bin/ot-utility + +do-install: # see https://github.com/OpenTimer/OpenTimer/issues/47 +.for e in ot-shell ot-tau15 ot-tau18 ot-utility + ${INSTALL_PROGRAM} ${WRKSRC}/bin/${e} ${STAGEDIR}${PREFIX}/bin +.endfor + +do-test: # runs the script suggested in https://github.com/OpenTimer/OpenTimer + @cd ${WRKSRC} && \ + bin/ot-shell < ${FILESDIR}/test.txt + +.include diff --git a/cad/opentimer/distinfo b/cad/opentimer/distinfo new file mode 100644 index 000000000000..3675a4144794 --- /dev/null +++ b/cad/opentimer/distinfo @@ -0,0 +1,3 @@ +TIMESTAMP = 1631485980 +SHA256 (OpenTimer-OpenTimer-g20210726-18d28ff_GH0.tar.gz) = 17c766c81c086419fc95c24576a511f43b8219d8402f8651d3c942d79bf0f4b4 +SIZE (OpenTimer-OpenTimer-g20210726-18d28ff_GH0.tar.gz) = 120737819 diff --git a/cad/opentimer/files/patch-ot_utility_logger.hpp b/cad/opentimer/files/patch-ot_utility_logger.hpp new file mode 100644 index 000000000000..0b80b5c04342 --- /dev/null +++ b/cad/opentimer/files/patch-ot_utility_logger.hpp @@ -0,0 +1,12 @@ +- workaround for missing S_IRUSR,etc, see https://github.com/OpenTimer/OpenTimer/issues/46 + +--- ot/utility/logger.hpp.orig 2021-09-12 22:40:42 UTC ++++ ot/utility/logger.hpp +@@ -13,6 +13,7 @@ + #include + #include + #include ++#include + + namespace ot { + diff --git a/cad/opentimer/files/test.txt b/cad/opentimer/files/test.txt new file mode 100644 index 000000000000..7b53374682e4 --- /dev/null +++ b/cad/opentimer/files/test.txt @@ -0,0 +1,5 @@ +cd example/simple +read_celllib osu018_stdcells.lib +read_verilog simple.v +read_sdc simple.sdc +report_timing diff --git a/cad/opentimer/pkg-descr b/cad/opentimer/pkg-descr new file mode 100644 index 000000000000..95b3946d0ff6 --- /dev/null +++ b/cad/opentimer/pkg-descr @@ -0,0 +1,11 @@ +OpenTimer is a new static timing analysis (STA) tool to help IC designers +quickly verify the circuit timing. It is developed completely from the ground up +using C++17 to efficiently support parallel and incremental timing. + +Key features are: +* Industry standard format (.lib, .v, .spef, .sdc) support +* Graph- and path-based timing analysis +* Parallel incremental timing for fast timing closure +* Award-winning tools and golden timers in CAD Contests + +WWW: https://github.com/OpenTimer/OpenTimer