diff --git a/cad/py-vunit-hdl/Makefile b/cad/py-vunit-hdl/Makefile
index fd74df133f89..1040a3b9cb76 100644
--- a/cad/py-vunit-hdl/Makefile
+++ b/cad/py-vunit-hdl/Makefile
@@ -1,23 +1,29 @@
 PORTNAME=	vunit-hdl
-DISTVERSION=	4.6.2
-PORTREVISION=	1
+DISTVERSIONPREFIX=	v
+DISTVERSION=	4.7.0
 CATEGORIES=	cad python
-MASTER_SITES=	PYPI
+#MASTER_SITES=	PYPI # some files are missing during tests
 PKGNAMEPREFIX=	${PYTHON_PKGNAMEPREFIX}
 DISTNAME=	${PORTNAME:S/-/_/}-${PORTVERSION}
 
 MAINTAINER=	yuri@FreeBSD.org
 COMMENT=	Open source unit testing framework for VHDL/SystemVerilog
 WWW=		https://vunit.github.io/
 
 LICENSE=	MPL20
 
 BUILD_DEPENDS=	${PYTHON_PKGNAMEPREFIX}setuptools_scm>0:devel/py-setuptools_scm@${PY_FLAVOR} \
 		${PYTHON_PKGNAMEPREFIX}wheel>0:devel/py-wheel@${PY_FLAVOR}
+RUN_DEPENDS=	ghdl:cad/ghdl
+TEST_DEPENDS=	pylint:devel/pylint@${PY_FLAVOR}
 
-USES=		python:3.6+
-USE_PYTHON=	pep517 autoplist pytest # 2 tests fail, see https://github.com/VUnit/vunit/issues/886
+USES=		python:3.7+
+USE_PYTHON=	pep517 autoplist pytest # 42 tests fail, see https://github.com/VUnit/vunit/issues/941
+
+USE_GITHUB=	yes
+GH_ACCOUNT=	VUnit
+GH_PROJECT=	vunit
 
 NO_ARCH=	yes
 
 .include <bsd.port.mk>
diff --git a/cad/py-vunit-hdl/distinfo b/cad/py-vunit-hdl/distinfo
index 8ba2274b0717..ee073ad00262 100644
--- a/cad/py-vunit-hdl/distinfo
+++ b/cad/py-vunit-hdl/distinfo
@@ -1,3 +1,3 @@
-TIMESTAMP = 1677122440
-SHA256 (vunit_hdl-4.6.2.tar.gz) = 8e1ead85731c0d0f8964887f8c4be9319a32f4a0335d6da4c531d5994e94bbfd
-SIZE (vunit_hdl-4.6.2.tar.gz) = 627490
+TIMESTAMP = 1686096347
+SHA256 (VUnit-vunit-v4.7.0_GH0.tar.gz) = 9e66a2eb5d48f5e5f668cd1d1f34166c8d5d075ff0b917f6a1933aee82e73a7c
+SIZE (VUnit-vunit-v4.7.0_GH0.tar.gz) = 7082367