diff --git a/science/fastcap/Makefile b/science/fastcap/Makefile
index 8ff81670eb85..caee3aa4eaca 100644
--- a/science/fastcap/Makefile
+++ b/science/fastcap/Makefile
@@ -1,65 +1,59 @@
 PORTNAME=	fastcap
-DISTVERSION=	2.0wr-011109
-PORTREVISION=	1
+DISTVERSION=	2.0wr-010524
+PORTEPOCH=	1
 CATEGORIES=	science cad
-MASTER_SITES=	http://www.wrcad.com/ftp/pub/ LOCAL/bf
+MASTER_SITES=	http://www.wrcad.com/ftp/pub/
 
 MAINTAINER=	ports@FreeBSD.org
 COMMENT=	Three-dimensional capacitance extraction program
 WWW=		https://www.rle.mit.edu/cpg/research_codes.htm
 
 LICENSE=	FASTCAP
 LICENSE_NAME=	fastcap license
 LICENSE_FILE=	${WRKSRC}/LICENSE
 LICENSE_PERMS=	auto-accept
 
-HAS_CONFIGURE=	yes
+USES=		gmake
+USE_GCC=	yes
+
+HAS_CONFIGURE=		yes
 CONFIGURE_SCRIPT=	config
-WRKSRC=		${WRKDIR}/fastcap-2.0wr
 
 # Fix build with clang11
 CFLAGS+=	-fcommon
 # Use malloc
 CFLAGS+=	-DNO_SBRK
 
+BINARY_ALIAS=	gcc=gcc${GCC_DEFAULT} make=gmake
+
+WRKSRC=		${WRKDIR}/fastcap-2.0wr
+
 BINFILES=	busgen capgen cubegen fastcap pipedgen pyragen
 
 OPTIONS_DEFINE=	DOCS EXAMPLES
 
 post-extract:
 	@${HEAD} -32 ${WRKSRC}/src/direct.c | ${TAIL} +2 > ${WRKSRC}/LICENSE
 
 post-patch:
-	@${REINPLACE_CMD} -e 's,TYPE=other,TYPE=4,' \
-		${WRKSRC}/config
-	@${REINPLACE_CMD} -Ee '/CFLAGS =/{s/=/+=/;s/-O[[:digit:]]*//;}' \
-		${WRKSRC}/src/Makefile.4
-# Minimal changes to fix the Clang build (there should be a more thorough
-# clean-up, to correct types of functions, remove implicit declarations, fix
-# formatting, add missing returns, etc.)
-	@${REINPLACE_CMD} -E -e 's,^mul(Up|Down),void &,' \
-		${WRKSRC}/src/mulDo.c
-	@${REINPLACE_CMD} -e 's,^mulMatUp,void &,' \
-		${WRKSRC}/src/mulMats.c
-	@${REINPLACE_CMD} -e 's,^static getnbrs,static void getnbrs,' \
-		${WRKSRC}/src/mulSetup.c
+	@${REINPLACE_CMD} -e 's,TYPE=other,TYPE=4,' ${WRKSRC}/config
 # Change "cd foo ; $(MAKE)" into "$(MAKE) -C foo" to unbreak parallel builds
 	@${REINPLACE_CMD} -E 's,cd (.+) ; (\$$\(MAKE\)),\2 -C \1,' \
 		${WRKSRC}/Makefile
 # Avoid clashing of generated temporary files, crucial for parallel builds
 	@${REINPLACE_CMD} -e 's,temp\.out,$$@.&,' ${WRKSRC}/src/Makefile*
 
 do-install:
 	${INSTALL_PROGRAM} ${BINFILES:S,^,${WRKSRC}/bin/,} ${STAGEDIR}${PREFIX}/bin
 
-do-install-EXAMPLES-on:
-	@${MKDIR} ${STAGEDIR}${EXAMPLESDIR}
-	${INSTALL_DATA} ${WRKSRC}/examples/* ${STAGEDIR}${EXAMPLESDIR}
-
 do-install-DOCS-on:
 	@${MKDIR} ${STAGEDIR}${DOCSDIR}
 	${CAT} ${WRKSRC}/README ${WRKSRC}/README.mit > ${STAGEDIR}${DOCSDIR}/readme
-	${INSTALL_DATA} ${WRKSRC}/doc/*.ps ${STAGEDIR}${DOCSDIR}
 	${GZIP_CMD} ${STAGEDIR}${DOCSDIR}/*
+	${INSTALL_DATA} ${WRKSRC}/doc/*.pdf ${STAGEDIR}${DOCSDIR}
+
+do-install-EXAMPLES-on:
+	@${MKDIR} ${STAGEDIR}${EXAMPLESDIR}
+	@cd ${WRKSRC}/examples/ && ${COPYTREE_SHARE} . ${STAGEDIR}${EXAMPLESDIR}
 
 .include <bsd.port.mk>
diff --git a/science/fastcap/distinfo b/science/fastcap/distinfo
index 02068acf1326..1b533817ae74 100644
--- a/science/fastcap/distinfo
+++ b/science/fastcap/distinfo
@@ -1,2 +1,3 @@
-SHA256 (fastcap-2.0wr-011109.tar.gz) = fc6e1734438771de6558ffc1e48e20db438b571bc3a67af92c45d175ec4c46c3
-SIZE (fastcap-2.0wr-011109.tar.gz) = 1596585
+TIMESTAMP = 1774364682
+SHA256 (fastcap-2.0wr-010524.tar.gz) = 4789942cfdc5e7b5d1e5e28fee55a2fe54adcebd725cba42ddf7a60e8d60df2b
+SIZE (fastcap-2.0wr-010524.tar.gz) = 3798267
diff --git a/science/fastcap/pkg-plist b/science/fastcap/pkg-plist
index 4e2f4ad730c5..9f8b0cf6a8d4 100644
--- a/science/fastcap/pkg-plist
+++ b/science/fastcap/pkg-plist
@@ -1,44 +1,67 @@
 bin/busgen
 bin/capgen
 bin/cubegen
 bin/fastcap
 bin/pipedgen
 bin/pyragen
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/1x1bus.lst
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/1x1coarse.neu
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/1x1fine.neu
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/1x1nonuni.neu
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/README
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/big_sphere1.neu
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/coated_sph.lst
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/cond_air_1x1.qui
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/cond_dielec_1x1.qui
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/connector2.sh
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/connector3.sh
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/connector4.sh
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/cubeeg.fig
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/dielec_face.neu
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/dielec_sides.neu
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/dielec_sides_2x2.neu
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/dielec_topbot.neu
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/pin
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/pipeeg.fig
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/ramcell.lst
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/ramcell.out
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/ramcell_bitl.neu
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/ramcell_botd.neu
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/ramcell_cond.neu
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/ramcell_gnd.neu
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/ramcell_test.neu
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/ramcell_topd.neu
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/ramgen.sh
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/sphere1.neu
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/sphere2.neu
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/sphere3.neu
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/testgen.sh
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/testrun.sh
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/via.neu
-%%PORTDOCS%%%%DOCSDIR%%/mtt.ps.gz
-%%PORTDOCS%%%%DOCSDIR%%/tcad.ps.gz
-%%PORTDOCS%%%%DOCSDIR%%/ug.ps.gz
+%%PORTEXAMPLES%%%%EXAMPLESDIR%%/work/Makefile
+%%PORTEXAMPLES%%%%EXAMPLESDIR%%/work/results/1x1bus.out
+%%PORTEXAMPLES%%%%EXAMPLESDIR%%/work/results/1x1coarse.out
+%%PORTEXAMPLES%%%%EXAMPLESDIR%%/work/results/1x1fine.out
+%%PORTEXAMPLES%%%%EXAMPLESDIR%%/work/results/1x1nonuni.out
+%%PORTEXAMPLES%%%%EXAMPLESDIR%%/work/results/big_sphere1.out
+%%PORTEXAMPLES%%%%EXAMPLESDIR%%/work/results/coated_sph.out
+%%PORTEXAMPLES%%%%EXAMPLESDIR%%/work/results/dielec_face.out
+%%PORTEXAMPLES%%%%EXAMPLESDIR%%/work/results/dielec_sides.out
+%%PORTEXAMPLES%%%%EXAMPLESDIR%%/work/results/dielec_sides_2x2.out
+%%PORTEXAMPLES%%%%EXAMPLESDIR%%/work/results/dielec_topbot.out
+%%PORTEXAMPLES%%%%EXAMPLESDIR%%/work/results/ramcell.out
+%%PORTEXAMPLES%%%%EXAMPLESDIR%%/work/results/ramcell_bitl.out
+%%PORTEXAMPLES%%%%EXAMPLESDIR%%/work/results/ramcell_botd.out
+%%PORTEXAMPLES%%%%EXAMPLESDIR%%/work/results/ramcell_cond.out
+%%PORTEXAMPLES%%%%EXAMPLESDIR%%/work/results/ramcell_gnd.out
+%%PORTEXAMPLES%%%%EXAMPLESDIR%%/work/results/ramcell_test.out
+%%PORTEXAMPLES%%%%EXAMPLESDIR%%/work/results/ramcell_topd.out
+%%PORTEXAMPLES%%%%EXAMPLESDIR%%/work/results/sphere1.out
+%%PORTEXAMPLES%%%%EXAMPLESDIR%%/work/results/sphere2.out
+%%PORTEXAMPLES%%%%EXAMPLESDIR%%/work/results/sphere3.out
+%%PORTEXAMPLES%%%%EXAMPLESDIR%%/work/results/via.out
+%%PORTEXAMPLES%%%%EXAMPLESDIR%%/work/run
 %%PORTDOCS%%%%DOCSDIR%%/readme.gz
+%%PORTDOCS%%%%DOCSDIR%%/FastCapsuppl.pdf
+%%PORTDOCS%%%%DOCSDIR%%/fastcap_paper.pdf
+%%PORTDOCS%%%%DOCSDIR%%/ug.pdf