In D25684#568391, @avg wrote:Also, I think that it did not make much sense to preset a pin to low before re-configuring it as output.
If the pin's initial state would be low then the preset was a NOP.
If the pin's initial state would be high, then that should be not an issue as its previous state would be kept just a for bit longer before we changed it to low.
But not sure.
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Please fix the bug description before commit.
Nov 15 2018
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Nov 14 2018
looks good to me. thanks.
Aug 22 2018
Aug 22 2018
loos accepted D16782: Fix 32-bit queue bandwidth limitation in pf and in the ALTQ token bucket regulator and HFSC scheduler.
This is great work. Thanks Patrick.
Aug 20 2018
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Jan 23 2018
We run a similar fix in pfSense for quite some time now.
Jan 17 2018
Jan 17 2018
Fixes the boot on espressobin/Armada 3700 with all (of the supported) devices enabled.
Oct 18 2017
Oct 18 2017
I don't like all the duplicate code in gpioiic.c.
Aug 8 2017
Aug 8 2017
loos accepted D11810: Add gpio methods to read/write/configure the state of up to 32 pins simultaneously.
I'm happy with this too, please go ahead Ian.
Aug 3 2017
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That's it! I knew I had missed something. Thanks!
May 18 2017
May 18 2017
While here, don't you want to add support for the 'hw.ncpu' tunable ?
A couple of long lines in new code but otherwise this is good to go.
loos added a comment to D10720: Fix memory corruption while configuring CPU windows on Marvell SoCs.
I think it is easier to use nitems() here.
May 17 2017
May 17 2017
Sorry, you will need to rebase this patch after r318426, on the other hand the changes were tested and built in -head.
May 16 2017
May 16 2017
I think you can simplify this fix if you move the OF_device_register_xref() to happen before the if(). This way the if() don't need to be changed:
May 9 2017
May 9 2017
loos updated the diff for D10601: Add the SDHCI Address Decoder registers and routines for ARMADA 38X..
Move the MACROs definition outside the #ifdefs and remove the now unnecessary #ifdefs.
loos added inline comments to D10601: Add the SDHCI Address Decoder registers and routines for ARMADA 38X..
loos updated the diff for D10601: Add the SDHCI Address Decoder registers and routines for ARMADA 38X..
Remove the #ifdef for decode_win_sdhci_valid() as requested by Marcin at Semihalf.
May 8 2017
May 8 2017
May 5 2017
May 5 2017
loos retitled D10606: Enable the SDHCI controller on ARMADA38X from Enable the SDHCI controller for ARMADA38X
loos added reviewers for D10606: Enable the SDHCI controller on ARMADA38X: zbb, mw_semihalf.com, jmcneill.
May 4 2017
May 4 2017
loos retitled D10601: Add the SDHCI Address Decoder registers and routines for ARMADA 38X. from Add the SDHCI Address Decoder registers and routines for ARMADA 38X.Sponsored by: Rubicon Communications, LLC (Netgate)
loos retitled D10602: Add a new SDHCI quirk, SDHCI_QUIRK_BROKEN_AUTO_STOP, to workaround issues on controllers with broken ACMD12 implementations. from Add a new SDHCI quirk, SDHCI_QUIRK_BROKEN_AUTO_STOP, to workaround controllersthat do not support or have broken ACMD12 implementations.Obtained from: NetbsdSponsored by: Rubicon Communications, LLC (Netgate)
loos retitled D10602: Add a new SDHCI quirk, SDHCI_QUIRK_BROKEN_AUTO_STOP, to workaround issues on controllers with broken ACMD12 implementations. from Add a new SDHCI quirk, SDHCI_QUIRK_BROKEN_AUTO_STOP, to workaround controllers
that do not support or have broken ACMD12 implementations.
Obtained from: Netbsd
Sponsored by: Rubicon Communications, LLC (Netgate) to Add a new SDHCI quirk, SDHCI_QUIRK_BROKEN_AUTO_STOP, to workaround controllersthat do not support or have broken ACMD12 implementations.Obtained from: NetbsdSponsored by: Rubicon Communications, LLC (Netgate).
loos retitled D10601: Add the SDHCI Address Decoder registers and routines for ARMADA 38X. from Add the SDHCI Address Decoder registers and routines for ARMADA 38X.
Sponsored by: Rubicon Communications, LLC (Netgate) to Add the SDHCI Address Decoder registers and routines for ARMADA 38X.Sponsored by: Rubicon Communications, LLC (Netgate).