powerpc? Do we want a table?

on CPUs that allow it. (not all do)

In fact, I think that this is not that important to put exact list in arch(7). I reformulated this into more vague note specifying that it is possible to have either.

Main point there I wanted to make is that address space available to usermode varies.

Only ARMv8 has optional 32bit mode, other architectures are dual-mode always, AFAIK. Please correct me. I mentioned AArch32 as a prerequisite.

Correct. VAX is the only other example I can think where some CPUs had the new mode, while others had both. That's not relevant here though.

@brooks might have something to say about this :-) It's useful (and correct) to accurately document this state of affairs as it exists today, although maybe a very brief comment about changes coming up?

*the* kernel uses *a* separate address space

Maybe "kernel and user share a single address space"?

user main thread?

Maybe "All FreeBSD architectures use some variant of"

Could you propose the wording ? I believe that chery is neither ILP32 nor LP64, so more editing will be required at that time.

IMO for now it is enough to reflect the present state.

Maybe something like:

In order to maximize compatibility with future pointer integrity mechanisms,
manipulations of pointers as integers should be performed via
.Vt uintptr_t
or
.Vt intptr_t
and no other types.
In particular,
.Vt long
and
.Vt ptrdiff_t
should be avoided.