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Differential D25523

riscv pmap: zero reserved pte bits in ppn
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Authored by freebsdphab-AX9_cmx.ietfng.org on Jun 30 2020, 8:08 PM.
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rS362853: riscv pmap: zero reserved pte bits in ppn
Summary

The top 10 bits of a pte are reserved by specification and are not part of the PPN

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rS FreeBSD src repository - subversion
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freebsdphab-AX9_cmx.ietfng.org created this revision.Jun 30 2020, 8:08 PM
Herald added a subscriber: imp. · View Herald TranscriptJun 30 2020, 8:08 PM
freebsdphab-AX9_cmx.ietfng.org requested review of this revision.Jun 30 2020, 8:08 PM
arichardson added a reviewer: riscv.Jun 30 2020, 9:50 PM
kp accepted this revision as: kp.Jul 1 2020, 1:30 PM
kp added a subscriber: kp.

For those playing along at home, from 'Volume II: RISC-V Privileged Architectures V20190608-Priv-MSU-Ratified', '4.4.1 Addressing and Memory Protection', page 72: "The PTE format for Sv39 is shown in Figure 4.18. Bits 9–0 have the same meaning as for Sv32. Bits 63–54 are reserved for future use and must be zeroed by software for forward compatibility.".

This revision is now accepted and ready to land.Jul 1 2020, 1:30 PM
mhorne added a subscriber: mhorne.Jul 1 2020, 3:32 PM
mhorne added inline comments.
sys/riscv/riscv/pmap.c
362 ↗(On Diff #73923)

I'd prefer to see a definition for the constant placed in pte.h, something like PTE_MASK.
Also, rather than splitting the expression in the middle, you could do:

#define PTE_TO_PHYS(pte) \
    ((((pte) & PTE_MASK) >> PTE_PPN0_S) * PAGE_SIZE)

(The second line has a 4-space indent)

freebsdphab-AX9_cmx.ietfng.org updated this revision to Diff 73978.Jul 1 2020, 5:20 PM

Feedback from mhorne.

This revision now requires review to proceed.Jul 1 2020, 5:20 PM
freebsdphab-AX9_cmx.ietfng.org marked an inline comment as done.Jul 1 2020, 5:20 PM
mhorne accepted this revision.Jul 1 2020, 5:33 PM
This revision is now accepted and ready to land.Jul 1 2020, 5:33 PM
kp accepted this revision.Jul 1 2020, 5:42 PM

@mhorne Do you want to commit or shall I?

mhorne added a comment.Jul 1 2020, 5:45 PM
In D25523#564539, @kp wrote:

@mhorne Do you want to commit or shall I?

Would you? Alongside D25524 if you don't mind.

Closed by commit rS362853: riscv pmap: zero reserved pte bits in ppn (authored by kp). · Explain WhyJul 1 2020, 7:15 PM
This revision was automatically updated to reflect the committed changes.
kp added a commit: rS362853: riscv pmap: zero reserved pte bits in ppn.
freebsdphab-AX9_cmx.ietfng.org mentioned this in D26607: riscv pmap: zero reserved pte bits in ppn for l2 leaf entries, too.Sep 30 2020, 12:35 PM

Revision Contents
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PathSize
head/
sys/
riscv/
include/
3 lines
riscv/
3 lines

Diff 73989

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head/sys/riscv/include/pte.h

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head/sys/riscv/riscv/pmap.c

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