MIPS core maps IRQ to OOB lines. Usually it's one-to-one, moreover IRQ# is same as OOB line number. But for some SoCs it can be different.
This adds IRQ discovery for BHND devices and avoid usage of static IRQ assignment.
Sample of output:
bhnd_mips0: <MIPS MIPS74k CPU, rev 1> mem 0x18003000-0x18003fff,0x18103000-0x18103fff at core 3 on bhnd0
bhnd_mips0: [BHND info] mipscore_attach:154 => ChipCommon I/O Controller: IRQ 2 as rid 0
bhnd_mips0: [BHND info] mipscore_attach:154 => 802.11 MAC/PHY/Radio: IRQ 3 as rid 0
bhnd_mips0: [BHND info] mipscore_attach:154 => Gigabit MAC core: IRQ 4 as rid 0
bhnd_mips0: [BHND info] mipscore_attach:154 => USB 2.0 Host Controller: IRQ 5 as rid 0
bhnd_mips0: [BHND info] mipscore_attach:154 => PCIe Bridge: IRQ 6 as rid 0
This patch is written in parallel with D7769, but it doesn't interfere with it. IMHO, some work should be done to marry them :)