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D19506.1789741620.diff
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D19506.1789741620.diff
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Index: sys/x86/include/specialreg.h
===================================================================
--- sys/x86/include/specialreg.h
+++ sys/x86/include/specialreg.h
@@ -1071,6 +1071,7 @@
#define MSR_VM_HSAVE_PA 0xc0010117 /* SVM: host save area address */
#define MSR_AMD_CPUID07 0xc0011002 /* CPUID 07 %ebx override */
#define MSR_EXTFEATURES 0xc0011005 /* Extended CPUID Features override */
+#define MSR_AMD_LS_CFG 0xc0011020
#define MSR_IC_CFG 0xc0011021 /* Instruction Cache Configuration */
/* MSR_VM_CR related */
Index: usr.sbin/bhyve/xmsr.c
===================================================================
--- usr.sbin/bhyve/xmsr.c
+++ usr.sbin/bhyve/xmsr.c
@@ -89,6 +89,10 @@
/* Ignore writes to the PerfCtr MSRs */
return (0);
+ case MSR_AMD_LS_CFG:
+ /* Ignore writes to the Errata MSRs */
+ return (0);
+
case MSR_P_STATE_CONTROL:
/* Ignore write to change the P-state */
return (0);
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D19506.1789741620.diff (942 B)
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D19506: Fix bug in bhyve by ignoring writes to errata MSRs in AMD cpus
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