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D14601.1789809740.diff
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D14601.1789809740.diff
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Index: sys/amd64/include/cpu.h
===================================================================
--- sys/amd64/include/cpu.h
+++ sys/amd64/include/cpu.h
@@ -92,6 +92,13 @@
return (rdtsc());
}
+static __inline int
+interrupts_enabled(void)
+{
+
+ return ((read_rflags() & PSL_I) != 0);
+}
+
#endif
#endif /* !_MACHINE_CPU_H_ */
Index: sys/arm/include/cpu.h
===================================================================
--- sys/arm/include/cpu.h
+++ sys/arm/include/cpu.h
@@ -52,7 +52,17 @@
return ((uint64_t)bt.sec << 56 | bt.frac >> 8);
#endif
}
-#endif
+
+static __inline int
+interrupts_enabled(void)
+{
+ register_t ret;
+
+ __asm __volatile("mrs %0, cpsr" : "=&r" (ret));
+
+ return ((ret & (PSR_I | PSR_F)) != 0);
+}
+#endif /* _KERNEL */
#define TRAPF_USERMODE(frame) ((frame->tf_spsr & PSR_MODE) == PSR_USR32_MODE)
Index: sys/arm64/include/cpu.h
===================================================================
--- sys/arm64/include/cpu.h
+++ sys/arm64/include/cpu.h
@@ -168,6 +168,16 @@
return (ret);
}
+static __inline int
+interrupts_enabled(void)
+{
+ register_t ret;
+
+ __asm __volatile("mrs %x0, daif" : "=&r" (ret));
+
+ return ((ret & (PSR_I | PSR_F)) != 0);
+}
+
#define ADDRESS_TRANSLATE_FUNC(stage) \
static inline uint64_t \
arm64_address_translate_ ##stage (uint64_t addr) \
Index: sys/i386/include/cpu.h
===================================================================
--- sys/i386/include/cpu.h
+++ sys/i386/include/cpu.h
@@ -87,6 +87,13 @@
return (cpu_ticks());
}
+static __inline int
+interrupts_enabled(void)
+{
+
+ return ((read_eflags() & PSL_I) != 0);
+}
+
#endif
#endif /* !_MACHINE_CPU_H_ */
Index: sys/mips/include/cpu.h
===================================================================
--- sys/mips/include/cpu.h
+++ sys/mips/include/cpu.h
@@ -87,5 +87,12 @@
void cpu_halt(void);
void cpu_reset(void);
+static __inline int
+interrupts_enabled(void)
+{
+
+ return ((mips_rd_status() & MIPS_SR_INT_IE) != 0);
+}
+
#endif /* _KERNEL */
#endif /* !_MACHINE_CPU_H_ */
Index: sys/powerpc/include/cpu.h
===================================================================
--- sys/powerpc/include/cpu.h
+++ sys/powerpc/include/cpu.h
@@ -124,4 +124,15 @@
void fork_trampoline(void);
void swi_vm(void *);
+#ifdef _KERNEL
+
+static __inline int
+interrupts_enabled(void)
+{
+
+ return ((mfmsr() & PSL_EE) != 0);
+}
+
+#endif /* _KERNEL */
+
#endif /* _MACHINE_CPU_H_ */
Index: sys/riscv/include/cpu.h
===================================================================
--- sys/riscv/include/cpu.h
+++ sys/riscv/include/cpu.h
@@ -49,6 +49,8 @@
#ifdef _KERNEL
+#include <machine/riscvreg.h>
+
/*
* 0x0000 CPU ID unimplemented
* 0x0001 UC Berkeley Rocket repo
@@ -89,6 +91,19 @@
return (1);
}
+static __inline int
+interrupts_enabled(void)
+{
+ register_t ret;
+
+ __asm __volatile(
+ "csrr %0, sstatus"
+ : "=&r" (ret)
+ );
+
+ return ((ret & SSTATUS_SIE) != 0);
+}
+
#endif
#endif /* !_MACHINE_CPU_H_ */
Index: sys/sparc64/include/cpu.h
===================================================================
--- sys/sparc64/include/cpu.h
+++ sys/sparc64/include/cpu.h
@@ -51,6 +51,8 @@
#ifdef _KERNEL
+#include <machine/pstate.h>
+
extern char btext[];
extern char etext[];
@@ -68,6 +70,13 @@
return (rd(tick));
}
+static __inline int
+interrupts_enabled(void)
+{
+
+ return ((rdpr(pstate) & PSTATE_IE) != 0);
+}
+
#endif
#endif /* !_MACHINE_CPU_H_ */

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