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D42233.id128846.diff
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diff --git a/sys/amd64/amd64/fpu.c b/sys/amd64/amd64/fpu.c
--- a/sys/amd64/amd64/fpu.c
+++ b/sys/amd64/amd64/fpu.c
@@ -167,6 +167,11 @@
int use_xsave; /* non-static for cpu_switch.S */
uint64_t xsave_mask; /* the same */
+SYSCTL_INT(_hw, OID_AUTO, use_xsave, CTLFLAG_RDTUN | CTLFLAG_NOFETCH,
+ &use_xsave, 0, "Use the XSAVE CPU feature");
+SYSCTL_U64(_hw, OID_AUTO, xsave_mask, CTLFLAG_RDTUN | CTLFLAG_NOFETCH,
+ &xsave_mask, 0, "Enabled XSAVE instructions");
+
static uma_zone_t fpu_save_area_zone;
static struct savefpu *fpu_initialstate;
diff --git a/sys/amd64/amd64/initcpu.c b/sys/amd64/amd64/initcpu.c
--- a/sys/amd64/amd64/initcpu.c
+++ b/sys/amd64/amd64/initcpu.c
@@ -60,6 +60,9 @@
* 1: force disable CLFLUSH
*/
static int hw_clflush_disable = -1;
+SYSCTL_INT(_hw, OID_AUTO, clflush_disable, CTLFLAG_RDTUN | CTLFLAG_NOFETCH,
+ &hw_clflush_disable, 0,
+ "Disable kernel's use of CLFLUSH / CLFLUSHOPT. (-1: automatic, 0: keep enable, 1: force disable)");
static void
init_amd(void)
diff --git a/sys/amd64/amd64/machdep.c b/sys/amd64/amd64/machdep.c
--- a/sys/amd64/amd64/machdep.c
+++ b/sys/amd64/amd64/machdep.c
@@ -848,6 +848,12 @@
#define PAGES_PER_GB (1024 * 1024 * 1024 / PAGE_SIZE)
+static u_long memtest;
+static SYSCTL_NODE(_hw, OID_AUTO, memtest, CTLFLAG_RW | CTLFLAG_MPSAFE,
+ NULL, NULL);
+SYSCTL_ULONG(_hw_memtest, OID_AUTO, tests, CTLFLAG_RDTUN | CTLFLAG_NOFETCH,
+ &memtest, 0, "Enable boot memory test");
+
/*
* Populate the (physmap) array with base/bound pairs describing the
* available physical memory in the system, then test this memory and
@@ -863,7 +869,7 @@
{
int i, physmap_idx, pa_indx, da_indx;
vm_paddr_t pa, physmap[PHYS_AVAIL_ENTRIES];
- u_long physmem_start, physmem_tunable, memtest;
+ u_long physmem_start, physmem_tunable;
pt_entry_t *pte;
quad_t dcons_addr, dcons_size;
int page_counter;
@@ -922,7 +928,6 @@
* A general name is used as the code may be extended to support
* additional tests beyond the current "page present" test.
*/
- memtest = 0;
TUNABLE_ULONG_FETCH("hw.memtest.tests", &memtest);
/*
diff --git a/sys/amd64/amd64/pmap.c b/sys/amd64/amd64/pmap.c
--- a/sys/amd64/amd64/pmap.c
+++ b/sys/amd64/amd64/pmap.c
@@ -2456,6 +2456,10 @@
}
#endif
+static int skz63;
+SYSCTL_INT(_hw, OID_AUTO, skz63_enable, CTLFLAG_RDTUN | CTLFLAG_NOFETCH,
+ &skz63, 0, "Skylake-X errata SKZ63");
+
/*
* Initialize the pmap module.
* Called by vm_init, to initialize any structures that the pmap
@@ -2466,7 +2470,7 @@
{
struct pmap_preinit_mapping *ppim;
vm_page_t m, mpte;
- int error, i, ret, skz63;
+ int error, i, ret;
/* L1TF, reserve page @0 unconditionally */
vm_page_blacklist_add(0, bootverbose);
diff --git a/sys/amd64/vmm/amd/npt.c b/sys/amd64/vmm/amd/npt.c
--- a/sys/amd64/vmm/amd/npt.c
+++ b/sys/amd64/vmm/amd/npt.c
@@ -48,14 +48,18 @@
#define NPT_IPIMASK 0xFF
+static int enable_superpage;
+SYSCTL_INT(_hw_vmm_npt, OID_AUTO, enable_superpage,
+ CTLFLAG_RDTUN | CTLFLAG_NOFETCH, &enable_superpage, 0, NULL);
+
/*
* AMD nested page table init.
*/
int
svm_npt_init(int ipinum)
{
- int enable_superpage = 1;
+ enable_superpage = 1;
npt_flags = ipinum & NPT_IPIMASK;
TUNABLE_INT_FETCH("hw.vmm.npt.enable_superpage", &enable_superpage);
if (enable_superpage)
diff --git a/sys/amd64/vmm/intel/ept.c b/sys/amd64/vmm/intel/ept.c
--- a/sys/amd64/vmm/intel/ept.c
+++ b/sys/amd64/vmm/intel/ept.c
@@ -73,10 +73,21 @@
SYSCTL_INT(_hw_vmm_ept, OID_AUTO, pmap_flags, CTLFLAG_RD,
&ept_pmap_flags, 0, NULL);
+static int use_superpages;
+SYSCTL_INT(_hw_vmm_ept, OID_AUTO, use_superpages,
+ CTLFLAG_RDTUN | CTLFLAG_NOFETCH, &use_superpages, 0, NULL);
+
+static int use_hw_ad_bits;
+SYSCTL_INT(_hw_vmm_ept, OID_AUTO, use_hw_ad_bits,
+ CTLFLAG_RDTUN | CTLFLAG_NOFETCH, &use_hw_ad_bits, 0, NULL);
+
+static int use_exec_only;
+SYSCTL_INT(_hw_vmm_ept, OID_AUTO, use_exec_only,
+ CTLFLAG_RDTUN | CTLFLAG_NOFETCH, &use_exec_only, 0, NULL);
+
int
ept_init(int ipinum)
{
- int use_hw_ad_bits, use_superpages, use_exec_only;
uint64_t cap;
cap = rdmsr(MSR_VMX_EPT_VPID_CAP);
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